1. Field of the Invention
The present invention relates to a flat panel display device capable of improving resolution and aperture ratio by attaching first and second substrates to each other, which include organic light emitting diodes (OLEDs), respectively, and more particularly, to an active matrix OLED display device capable of increasing an aperture ratio of an emission region by forming a thin film transistor (TFT) used in an active matrix flat panel display device in a layered structure.
2. Description of the Related Art
While a cathode ray tube (CRT), a conventional display device, has been widely used as a monitor in TVs, measuring instruments, information terminals, and similar devices, it is difficult to adapt the CRT for use in a small-sized and light-weight electronic devices, due to its weight and size.
As a substitute for the CRT, a flat panel display device is attracting public attention, which can readily be made small in size and light-weight. Flat panel display devices include liquid crystal displays (LCDs), OLED displays and similar devices.
Flat panel display devices (FPD) are classified into passive matrix FPDs and active matrix FPDs based on a driving mechanism.
FIGS. 1A and 1B are cross-sectional views of a conventional top emission OLED display device.
First, a buffer layer having a predetermined thickness (not shown) is formed on a first substrate 100 having red, green, and blue pixel regions. The buffer layer is formed to prevent impurities from leaking from the first substrate 100 into a TFT to be formed through the following process.
Next, a polysilicon layer pattern (not shown) is formed on the buffer layer, and impurities are implanted into both sides of the polysilicon layer pattern to form source and drain regions. At this time, a channel region is formed between the source and drain regions.
Next, a gate insulating layer (not shown) is formed on the entire surface of the resultant structure, and a gate electrode is formed to correspond to the channel region of the polysilicon layer pattern.
Next, an interlayer insulating layer (not shown) is formed on the entire surface of the resulting structure and then etched to form a contact hole (not shown) for exposing the source and drain regions. Source and drain electrodes (not shown) are formed to be connected to the source and drain regions through the contact hole.
Then, a passivation layer (not shown) and a planarization layer (not shown) are formed on the entire surface of the resultant structure.
Next, the passivation layer and the planarization layer are etched to form a via-hole for exposing the drain electrode.
A pixel electrode (not shown) connected to the drain electrode through the via-hole is formed. The pixel electrode may be a reflective electrode.
Next, a portion of the pixel electrode is exposed to form a pixel defining layer pattern for defining an emission region,
Then, an organic layer (not shown) including at least an emission layer and an opposite electrode are formed on the entire surface of the resultant structure.
Next, a transparent passivation layer (not shown) is formed on the opposite electrode.
A second substrate 200 is correspondingly attached and sealed to the first substrate 100.
FIG. 2 is a photograph illustrating a pixel region of an OLED display formed through the method, region A represents an emission region, and region B represents a non-emission region.
As described above, the conventional OLED display is an active matrix OLED display, and a pixel region includes an emission region A and a non-emission region B. Each pixel includes a switching TFT, a driving TFT, a capacitor, and a light emitting diode. As a result, each pixel of the OLED display includes two TFTs and one capacitor. It is difficult to reduce the size of the TFTs and the capacitor, because the device is integrated, as a result, a decrease of the emission region leads to a reduction in an aperture ratio.